Mr. Jaynand Bhagat
Assistant Professor
Mr. Jaynand Bhagat is an Assistant Professor in the Department of Electronics and Communication Engineering at Dayananda Sagar University, Bengaluru. He is actively involved in teaching and research in the areas of VLSI Design, Digital System Design, Digital Signal Processing, and Hardware-Efficient Computing Architecture. he is committed to fostering analytical and computational thinking among students.
He holds an M.Tech in System on Chip Design from the Indian Institute of Technology (IIT), Palakkad, and a B.Tech in Electrical and Electronics Engineering from Bihar Engineering University. His strong foundation in electronics and VLSI engineering, combined with rigorous training in hardware-oriented computational techniques, enables him to contribute effectively to both undergraduate and postgraduate teaching.
His research interests include Digital Signal Processing, Adaptive Filtering and ASIC/FPGA-Based System Design. he has worked on the design and implementation of a Log-Based Hammerstein Spline Adaptive Filter (HSAF) architecture for nonlinear system identification, achieving significant reductions in hardware area and power consumption through architectural optimization Under the guidance of Dr. Subhramanayam Mula at IIT Palakkad. He also has experience in digital design and verification using Verilog and SystemVerilog, with projects involving FIFO verification, finite state machine design, and hardware implementations of signal processing algorithms such as DCT and IDCT.
He has served as a Teaching Assistant for the courses VLSI Design Lab and VLSI architecture for signal processing and machine learning at IIT Palakkad.
Mr. Jaynand Bhagat has demonstrated outstanding academic excellence throughout his educational journey. He was awarded the Gold Medal in Electrical and Electronics Engineering by Bihar Engineering University for securing the highest CGPA in his graduating batch (2020-24). He qualified the GATE 2024 in Electrical Engineering (EE) and Electronics and Communication Engineering (EC) and GATE 2026 in EC. His consistent performance in these highly competitive national-level examinations reflects his strong technical foundation, subject expertise, and commitment to academic and professional excellence.
Email : This email address is being protected from spambots. You need JavaScript enabled to view it.
Phone : +91 8434587913
GitHub : https://github.com/jaynandbhagat
LinkedIn : https://www.linkedin.com/in/jaynand-bhagat-21750531a/





